In a known manner, supercomputers are formed by joining nodes each gathering several processors. These supercomputers consist in multiplying processors, so as to be able to simultaneously execute a great number of computations. As illustrated in FIG. 1, these supercomputers 1 known in prior art typically comprise several nodes 2 each comprising a network controller 3 and connected to each other by an interconnection network 4. Besides, a management network 5 interacts with the nodes 2 in order to configure them, monitor them and administer them.
The main function of an interconnecting network is to convey data between different nodes. Interconnection networks are thus a factor limiting the supercomputer performance, the performance of the supercomputer depending in particular on the communication latency and the pass-band. In other words, the performance of these supercomputers depends partly on the performance of the interconnection networks.
Because of the great number of connections, routers and nodes, the design of such interconnection networks is complex. In order to validate a design, it is known to use a simulator enabling different technological choices carried out during designing interconnection networks to be studied and validated.
Discrete event simulators such as ns-2, OMNeT++/OMNEST, SST, or even simGrid consider event sequences over time. However, they take no account of what happens in the time interval between two events. However, the behaviour between two events is often necessary for a large scale simulation. This implementation prohibits the use of an operating interface in real time, for example of the SNMP type. With these approaches, it is thus not necessary to simulate a high rate interconnection network in real time.